Big growth for tiny packages
James Carbone -- Purchasing, 8/17/2006 2:00:00 AM
The popularity of cell phones, iPods and other portable equipment is driving suppliers to produce more semiconductors in chip scale, quad flat pack no lead (QFN) and small ball grid array (BGA) packages.
There is also growing demand for multichip packages which combine two or more chips in a single package and for package stacking in order to save board space.
“Cell phones, iPods, MP3 players, digital cameras are driving miniaturization,” says Edgar Zuniga, high volume analog and logic marketing manager for Texas Instruments in Dallas. “We are introducing packages as small as 2 x 2 mm and see significant growth for wafer chip scale packages and QFN for our more complex logic functions,” he says. Equipment manufacturers such as cell phone manufacturers want to shrink components in their products for several reasons.
“OEMs are pushing us to produce components that allow them to reduce the total number of parts that go into a phone,” says Michael Hundt, director of packaging development for Geneva-based chip maker STMicroelectronics. “Their objective is to reduce parts count by a factor of five over the next few years.”
By reducing package size and component count, equipment manufacturers can have more room in their device for the battery or to add features like gaming, global positioning system (GPS) functionality or additional cameras, Hundt says. Having more room for a battery can increase the run time of portable product.
Wafer chip scale packages are one way to save board space. Such packages have no pins or wires, but use contact pads instead. The pads may be etched or printed directly onto the silicon die. The result is a package that is no greater than 1.2 times that of the die.
Depopulated QFN (DQFN) packages are also being used to save board space. DQFN is a leadless package where electrical contact is made by soldering the pads on the bottom of the package rather than on the perimeter. That decreases the package footprint to nearly that of chip-scale packages.
Bruce Potvin, director of marketing for logic at Philips Semiconductor in the Netherlands, says a wafer chip scale solution requires a chip redesign, but DQFN doesn't. He adds DQFN uses the same technology and equipment as other surface-mount packages.
“You have a leadframe that is a rectangle. You apply the die to the leadframe, wire bond it and mold it over the top of the die and wire bonding and saw your part types out of the leadframe,” says Potvin. “The equipment is the same. The number of units you get in a leadframe matrix is different based on the kind of package.”
He says a 3-pin small outline transistor (SOT) yields about 11,000 leadframes per strip. A 20-pin DQFN results in about 3,500 leadframe per strip.
DQFN is designed into PCs, cell phones, MP3 players, test equipment, communications products and automotive systems, Potvin says.
A DQFN package is 75% smaller than thin shrink small-outline package.
Saving space. Cell phone manufacturers are using multichip packages (MCP) to save board space and reduce component count.
“Over the past three years, there has been healthy growth in multichip packages,” says Kevin Hsu, manager of product marketing MCP for Samsung Semiconductor in San Jose, Calif. Most MCPs are used in cell phones, smart phones such as Blackberry and Palm Trios and in wireless PC cards which provide computer users with broadband access. They contain NAND flash and DRAM.
Hsu says MCPs have reached price parity with discrete components which will further drive demand.
As part of the push to downsize packages, Hsu says Samsung is also developing wafer stack packages which will be smaller than an MCP. A typical MCP is about 10.5mm x 13mm with a height of 1.2-1.4mm. A wafer stack package will be 50% smaller and about 30% thinner, according to Hsu.
As the name implies, dies are stacked on top of each other “on a vertical scale using adhesive and bond wires. It is kind of like through-hole so instead of bonding out, you are actually drilling down so the leads are much smaller,” he says. Besides saving space, electrical performance increases and less power is needed, according to Hsu.
Another package that will become more widely used is package on package (PoP). He says with PoP, one package—usually a memory module—is stacked on top of a processor.
“With MCP, you have a processor side by side with memory. With PoP, memory is on top of the processor so cell phone makers save board real estate,” says Hsu.
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